NEO Semiconductor unveils NEO.AI memory platform for AI processors

NEO Semiconductor has launched NEO.AI, a memory platform combining new SRAM and DRAM architectures to tackle capacity bottlenecks in AI processors. The company claims its X-SRAM technology can provide up to five times greater on-chip memory density, while 3D X-DRAM could increase high-bandwidth memory (HBM) capacity by as much as tenfold. For eeNews Europe readers, the technologies offer a potentially significant route around the scaling limits affecting AI accelerators, advanced CMOS designs and future HBM systems. More memory inside AI processors AI processor performance increasingly depends on keeping data close to the compute engines. However, conventional SRAM scaling has slowed at advanced process nodes, limiting how much cache can be integrated alongside CPUs, GPUs and AI accelerators. NEO says X-SRAM delivers up to five times the density of conventional SRAM while retaining SRAM-class performance. The architecture is also designed to work with advanced nanosheet CMOS processes and provide a route toward monolithic 3D implementations. “Memory innovation is becoming critical for the future of artificial intelligence,” said Andy Hsu, Founder and CEO of NEO Semiconductor. “With NEO.AI, we are introducing breakthrough technologies that address AI’s two biggest memory bottlenecks. X-SRAM dramatically expands on-chip memory density, while 3D X-DRAM dramatically increases HBM capacity. Together, they provide a scalable memory foundation for the next generation of AI systems and represent an important step toward breaking the AI Memory Wall.” Higher-density on-chip memory could help reduce data movement and improve processor utilization, although NEO has not yet disclosed detailed performance, power or silicon-area comparisons. 3D X-DRAM targets larger HBM stacks The second part of the platform, 3D X-DRAM, applies established 3D NAND manufacturing techniques to DRAM. NEO claims the technology can deliver up to ten times the capacity of conventional DRAM, potentially allowing substantially larger HBM systems for training and running increasingly complex AI models. The company has completed proof-of-concept validation, which it says demonstrates the architecture’s potential as a scalable and manufacturable option for next-generation HBM. Commercial products and production schedules have not been announced. By combining X-SRAM and 3D X-DRAM, the NEO.AI platform is intended to address both sides of what the company calls the “AI Memory Wall”: insufficient cache capacity within processors and limited capacity in external HBM. Moving toward commercialization NEO presented the platform at FMS: The Future of Memory and Storage 2026 in Santa Clara, California. The San Jose-based company, founded in 2012, is now advancing its memory technologies toward commercialization. Its wider intellectual property portfolio includes X-HBM, X-NAND and 3D X-AI alongside the newly introduced NEO.AI platform. The post NEO Semiconductor launches NEO.AI memory platform appeared first on eeNews Europe.